style(comp): fix VHDL coding style according to VSG

Author: jakubcabal

comp/base/buffers/top/fifo2nfifo.vhd

@@ -268,7 +268,7 @@ begin
 
         write_allow <= WRITE and (not sig_full(conv_integer(BLOCK_ADDR)));
         write_addr  <= (BLOCK_ADDR & reg_write_addr(conv_integer(BLOCK_ADDR))(ADDR_RANGE))
-                 - addr_fix(conv_integer(BLOCK_ADDR));
+                       - addr_fix(conv_integer(BLOCK_ADDR));
 
         -- block write allow signal
         more_flows_field : for j in 0 to FLOWS-1 generate

comp/base/buffers/top/nfifo2fifo.vhd

@@ -244,7 +244,7 @@ begin
 
         read_allow <= READ and PIPE_EN and (not blk_empty(conv_integer(BLOCK_ADDR)));
         read_addr  <= (BLOCK_ADDR & reg_read_addr(conv_integer(BLOCK_ADDR))(ADDR_RANGE))
-                - addr_fix(conv_integer(BLOCK_ADDR));
+                      - addr_fix(conv_integer(BLOCK_ADDR));
 
         -- block read allow signal
         more_flows_field : for j in 0 to FLOWS-1 generate

comp/base/fifo/asfifo/asfifo.vhd

@@ -121,7 +121,7 @@ begin
     --!    when reading and both the memory and the output registers are not empty OR
     --!    when the memory is not empty while the output registers are empty
     read_allow  <= (RD and NOT empty_signal and NOT reg_empty) or
-                  (NOT empty_signal and reg_empty);
+                   (NOT empty_signal and reg_empty);
 
     FULL   <= full_signal;
 

comp/base/misc/crossbarx/comp/uinstr_splitter/uinstr_splitter.vhd

@@ -150,8 +150,8 @@ begin
 
     -- Buffer B address of last item of the uInstruction
     rx_uinstr_b_last_item <= (unsigned(RX_UINSTR_B_COL) & unsigned(RX_UINSTR_B_ITEM))
-                            +resize(unsigned(RX_UINSTR_LEN),log2(BUF_B_COLS*BUF_B_ROWS*ROW_ITEMS))
-                            -1;
+                             +resize(unsigned(RX_UINSTR_LEN),log2(BUF_B_COLS*BUF_B_ROWS*ROW_ITEMS))
+                             -1;
 
     -----------------------------------------------------------------------
 

comp/mfb_tools/edit/frame_extender/mfb_frame_extender_datamover.vhd

@@ -214,8 +214,8 @@ begin
 
     -- control of packet template destination ready
     RX_CTRL_DST_RDY <= (TX_MFB_DST_RDY and RX_CTRL_INSERT_VLD and s_fifox_rdy) or
-                      (TX_MFB_DST_RDY and not RX_CTRL_INSERT_VLD) or
-                      (not RX_CTRL_SRC_RDY);
+                       (TX_MFB_DST_RDY and not RX_CTRL_INSERT_VLD) or
+                       (not RX_CTRL_SRC_RDY);
 
     -- control of payload accept
     s_last_addr <= unsigned(RX_CTRL_INSERT_MOVE(REGIONS*REGION_SIZE-1));
@@ -224,7 +224,7 @@ begin
 
     -- control of output source ready
     s_src_rdy <= (RX_CTRL_SRC_RDY and RX_CTRL_INSERT_VLD and s_fifox_rdy) or
-                (RX_CTRL_SRC_RDY and not RX_CTRL_INSERT_VLD);
+                 (RX_CTRL_SRC_RDY and not RX_CTRL_INSERT_VLD);
 
     -- =========================================================================
     --  0. REGISTER STAGE

comp/mfb_tools/flow/binder/mfb_binder_input.vhd

@@ -290,8 +290,8 @@ begin
     -- Checks present incomplete frames
     incomplete_frame_g : for r in 0 to REGIONS-1 generate
         s_inc_frame(r+1) <= (s_mfb_fifo_sof(r) and not s_mfb_fifo_eof(r) and not s_inc_frame(r)) or
-                          (s_mfb_fifo_sof(r) and s_mfb_fifo_eof(r) and s_inc_frame(r)) or
-                          (not s_mfb_fifo_sof(r) and not s_mfb_fifo_eof(r) and s_inc_frame(r));
+                            (s_mfb_fifo_sof(r) and s_mfb_fifo_eof(r) and s_inc_frame(r)) or
+                            (not s_mfb_fifo_sof(r) and not s_mfb_fifo_eof(r) and s_inc_frame(r));
     end generate;
 
     -- INCOMPLETE FRAME

comp/mfb_tools/flow/cutter_simple/mfb_cutter_simple.vhd

@@ -293,8 +293,8 @@ begin
 
     inc_frame_g : for r in 0 to REGIONS-1 generate
         s_inc_frame(r+1) <= (s_rx_sof_reg(r) and not s_new_eof_reg_fix(r) and not s_inc_frame(r)) or
-                                   (s_rx_sof_reg(r) and s_new_eof_reg_fix(r) and s_inc_frame(r)) or
-                                   (not s_rx_sof_reg(r) and not s_new_eof_reg_fix(r) and s_inc_frame(r));
+                            (s_rx_sof_reg(r) and s_new_eof_reg_fix(r) and s_inc_frame(r)) or
+                            (not s_rx_sof_reg(r) and not s_new_eof_reg_fix(r) and s_inc_frame(r));
     end generate;
 
     inc_frame_last_reg_p : process (CLK)

comp/mfb_tools/flow/dropper/mfb_dropper.vhd

@@ -133,8 +133,8 @@ begin
 
     inc_pkt_g : for r in 0 to REGIONS-1 generate
         s_inc_pkt(r+1) <= (s_sof(r) and not s_eof(r) and not s_inc_pkt(r)) or
-                        (s_sof(r) and s_eof(r) and s_inc_pkt(r)) or
-                        (not s_sof(r) and not s_eof(r) and s_inc_pkt(r));
+                          (s_sof(r) and s_eof(r) and s_inc_pkt(r)) or
+                          (not s_sof(r) and not s_eof(r) and s_inc_pkt(r));
     end generate;
 
     inc_pkt_reg_p : process (CLK)

comp/mfb_tools/flow/enabler/enabler.vhd

@@ -255,7 +255,7 @@ begin
     begin
         for r in 0 to REGIONS-1 loop
             s_discarded_frame(r) <= (RX_EOF(r) and not s_eof_fsm(r) and s_valid and not RESET) or
-                              (RX_EOF(r) and RX_SRC_RDY and not s_valid and not RESET);
+                                    (RX_EOF(r) and RX_SRC_RDY and not s_valid and not RESET);
         end loop;
     end process;
 

comp/mfb_tools/flow/frame_packer/fp_dropper.vhd

@@ -122,8 +122,8 @@ begin
 
     inc_pkt_g : for r in 0 to REGIONS-1 generate
         s_inc_pkt(r+1) <=   (s_sof(r) and not s_eof(r) and not s_inc_pkt(r)) or
-                            (s_sof(r) and     s_eof(r) and     s_inc_pkt(r)) or
-                            (not s_sof(r) and not s_eof(r) and     s_inc_pkt(r));
+                          (s_sof(r) and     s_eof(r) and     s_inc_pkt(r)) or
+                          (not s_sof(r) and not s_eof(r) and     s_inc_pkt(r));
     end generate;
 
     -- Remove register