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Design tutorials illustrate higher-level concepts or design flows, walk through specific examples or reference designs, and more complex and complete designs or applications.
| Tutorial | Description |
| Versal Custom Thin Platform Extensible System | Versal VCK190 System Example Design based on a thin custom platform (Minimal clocks and AXI exposed to PL) including HLS/RTL kernels and AI Engine kernel using a full Makefile build-flow. |
| Versal Custom Platform Integration using Vitis Subsystem | An end to end system design tutorial using Vitis Subsystem design and Vitis Export to Vivado Flow as described in UG1701. Check out the features demonstrated in this tutorial. |
| Versal AI Edge Gen2 Design flow with Vitis Unified IDE | This tutorial guides you creating an acceleration application for the VEK385 Evaluation board, starting from an extensible XSA with pre-built YOCTO binaries supporting EDF flow and built together in Vitis Unified IDE. |
| Flexible AI Engine Development: From Vitis to Vivado with Advanced Control | This tutorial demonstrates a complete workflow for integrating AI Engine designs using the Vitis Subsystem (VSS) → Vitis Metadata Archive (VMA) → Vivado Non-Project Mode (NPM) flow. This workflow enables independent AIE development, seamless transition from Vitis to Vivado, and advanced control for experienced hardware designers. |
| VCK190 Segmented Configuration with Petalinux | This tutorial guides you through creating a complete acceleration application for the VCK190 board using segmented configuration desing and Petalinux common image. You will learn how to build a hardware platform, integrate AI Engine and PL kernels, and deploy a complete system. |
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