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Merge pull request #217 from kth-step/get-contract-thm-fix
make get_arch_contract_thm output idiomatic theorems
2 parents a1c3eff + e705aeb commit 54bf3ec

10 files changed

Lines changed: 120 additions & 72 deletions

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examples/arm8/incr/incr_propScript.sml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ val _ = new_theory "incr_prop";
3939

4040
val arm8_cont_incr_thm =
4141
get_arm8_contract_thm
42-
bspec_cont_incr
42+
bspec_cont_incr incr_init_addr_def [incr_end_addr_def]
4343
bir_incr_progbin_def
4444
arm8_incr_pre_def arm8_incr_post_def
4545
bir_incr_prog_def
@@ -53,7 +53,6 @@ Theorem arm8_cont_incr:
5353
(arm8_incr_pre pre_x0)
5454
(arm8_incr_post pre_x0)
5555
Proof
56-
rw [incr_init_addr_def,incr_end_addr_def] >>
5756
ACCEPT_TAC arm8_cont_incr_thm
5857
QED
5958

@@ -62,6 +61,7 @@ QED
6261
(* ------------------------ *)
6362

6463
val readable_thm = computeLib.RESTR_EVAL_RULE [``arm8_weak_trs``] arm8_cont_incr;
64+
6565
Theorem arm8_cont_incr_full = GEN_ALL readable_thm;
6666

6767
val _ = export_theory ();

examples/arm8/isqrt/isqrt_propScript.sml

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ val _ = new_theory "isqrt_prop";
3939

4040
val arm8_cont_isqrt_1_thm =
4141
get_arm8_contract_thm
42-
bspec_cont_isqrt_1
42+
bspec_cont_isqrt_1 isqrt_init_addr_1_def [isqrt_end_addr_1_def]
4343
bir_isqrt_progbin_def
4444
arm8_isqrt_pre_1_def arm8_isqrt_post_1_def
4545
bir_isqrt_prog_def
@@ -53,13 +53,12 @@ Theorem arm8_cont_isqrt_1:
5353
(arm8_isqrt_pre_1 pre_x0)
5454
(arm8_isqrt_post_1 pre_x0)
5555
Proof
56-
rw [isqrt_init_addr_1_def,isqrt_end_addr_1_def] >>
5756
ACCEPT_TAC arm8_cont_isqrt_1_thm
5857
QED
5958

6059
val arm8_cont_isqrt_2_thm =
6160
get_arm8_contract_thm
62-
bspec_cont_isqrt_2
61+
bspec_cont_isqrt_2 isqrt_init_addr_2_def [isqrt_end_addr_2_def]
6362
bir_isqrt_progbin_def
6463
arm8_isqrt_pre_2_def arm8_isqrt_post_2_def
6564
bir_isqrt_prog_def
@@ -73,13 +72,12 @@ Theorem arm8_cont_isqrt_2:
7372
(arm8_isqrt_pre_2 pre_x1 pre_x3)
7473
(arm8_isqrt_post_2 pre_x1 pre_x3)
7574
Proof
76-
rw [isqrt_init_addr_2_def,isqrt_end_addr_2_def] >>
7775
ACCEPT_TAC arm8_cont_isqrt_2_thm
7876
QED
7977

8078
val arm8_cont_isqrt_3_thm =
8179
get_arm8_contract_thm
82-
bspec_cont_isqrt_3
80+
bspec_cont_isqrt_3 isqrt_init_addr_3_def [isqrt_end_addr_3_loop_def, isqrt_end_addr_3_ret_def]
8381
bir_isqrt_progbin_def
8482
arm8_isqrt_pre_3_def arm8_isqrt_post_3_def
8583
bir_isqrt_prog_def
@@ -93,7 +91,6 @@ Theorem arm8_cont_isqrt_3:
9391
(arm8_isqrt_pre_3 pre_x1 pre_x2 pre_x3)
9492
(arm8_isqrt_post_3 pre_x1 pre_x2 pre_x3)
9593
Proof
96-
rw [isqrt_init_addr_3_def,isqrt_end_addr_3_loop_def,isqrt_end_addr_3_ret_def] >>
9794
ACCEPT_TAC arm8_cont_isqrt_3_thm
9895
QED
9996

examples/arm8/max/max_propScript.sml

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ val _ = new_theory "max_prop";
3939

4040
val arm8_cont_max_thm =
4141
get_arm8_contract_thm
42-
bspec_cont_max
42+
bspec_cont_max max_init_addr_def [max_end_addr_def]
4343
bir_max_progbin_def
4444
arm8_max_pre_def arm8_max_post_def
4545
bir_max_prog_def
@@ -53,7 +53,6 @@ Theorem arm8_cont_max:
5353
(arm8_max_pre pre_x0 pre_x1)
5454
(arm8_max_post pre_x0 pre_x1)
5555
Proof
56-
rw [max_init_addr_def,max_end_addr_def] >>
5756
ACCEPT_TAC arm8_cont_max_thm
5857
QED
5958

examples/arm8/swap/swap_propScript.sml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ val _ = new_theory "swap_prop";
3939

4040
val arm8_cont_swap_thm =
4141
get_arm8_contract_thm
42-
bspec_cont_swap
42+
bspec_cont_swap swap_init_addr_def [swap_end_addr_def]
4343
bir_swap_progbin_def
4444
arm8_swap_pre_def arm8_swap_post_def
4545
bir_swap_prog_def
@@ -53,7 +53,6 @@ Theorem arm8_cont_swap:
5353
(arm8_swap_pre pre_x0 pre_x1 pre_x0_deref pre_x1_deref)
5454
(arm8_swap_post pre_x0 pre_x1 pre_x0_deref pre_x1_deref)
5555
Proof
56-
rw [swap_init_addr_def,swap_end_addr_def] >>
5756
ACCEPT_TAC arm8_cont_swap_thm
5857
QED
5958

@@ -62,6 +61,7 @@ QED
6261
(* ----------------------- *)
6362

6463
val readable_thm = computeLib.RESTR_EVAL_RULE [``arm8_weak_trs``] arm8_cont_swap;
64+
6565
Theorem arm8_cont_swap_full = GEN_ALL readable_thm;
6666

6767
val _ = export_theory ();

examples/riscv/incr/incr_propScript.sml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ val _ = new_theory "incr_prop";
3939

4040
val riscv_cont_incr_thm =
4141
get_riscv_contract_thm
42-
bspec_cont_incr
42+
bspec_cont_incr incr_init_addr_def [incr_end_addr_def]
4343
bir_incr_progbin_def
4444
riscv_incr_pre_def riscv_incr_post_def
4545
bir_incr_prog_def
@@ -53,7 +53,6 @@ Theorem riscv_cont_incr:
5353
(riscv_incr_pre pre_x10)
5454
(riscv_incr_post pre_x10)
5555
Proof
56-
rw [incr_init_addr_def,incr_end_addr_def] >>
5756
ACCEPT_TAC riscv_cont_incr_thm
5857
QED
5958

@@ -62,6 +61,7 @@ QED
6261
(* ------------------------ *)
6362

6463
val readable_thm = computeLib.RESTR_EVAL_RULE [``riscv_weak_trs``] riscv_cont_incr;
64+
6565
Theorem riscv_cont_incr_full = GEN_ALL readable_thm;
6666

6767
val _ = export_theory ();

examples/riscv/swap/swap_propScript.sml

Lines changed: 5 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -33,22 +33,15 @@ open swap_symb_transfTheory;
3333

3434
val _ = new_theory "swap_prop";
3535

36-
(* --------------------- *)
37-
(* Auxiliary definitions *)
38-
(* --------------------- *)
39-
40-
val progbin_tm = (fst o dest_eq o concl) bir_swap_progbin_def;
41-
val riscv_pre_tm = (fst o dest_comb o lhs o snd o strip_forall o concl) riscv_swap_pre_def;
42-
val riscv_post_tm = (fst o dest_comb o lhs o snd o strip_forall o concl) riscv_swap_post_def;
43-
4436
(* ---------------------------------- *)
4537
(* Backlifting BIR contract to RISC-V *)
4638
(* ---------------------------------- *)
4739

4840
val riscv_cont_swap_thm =
49-
get_riscv_contract
50-
bspec_cont_swap
51-
progbin_tm riscv_pre_tm riscv_post_tm
41+
get_riscv_contract_thm
42+
bspec_cont_swap swap_init_addr_def [swap_end_addr_def]
43+
bir_swap_progbin_def
44+
riscv_swap_pre_def riscv_swap_post_def
5245
bir_swap_prog_def
5346
[bspec_swap_pre_def]
5447
bspec_swap_pre_def swap_riscv_pre_imp_bspec_pre_thm
@@ -60,7 +53,6 @@ Theorem riscv_cont_swap:
6053
(riscv_swap_pre pre_x10 pre_x11 pre_x10_deref pre_x11_deref)
6154
(riscv_swap_post pre_x10 pre_x11 pre_x10_deref pre_x11_deref)
6255
Proof
63-
rw [swap_init_addr_def,swap_end_addr_def] >>
6456
ACCEPT_TAC riscv_cont_swap_thm
6557
QED
6658

@@ -69,6 +61,7 @@ QED
6961
(* ------------------------ *)
7062

7163
val readable_thm = computeLib.RESTR_EVAL_RULE [``riscv_weak_trs``] riscv_cont_swap;
64+
7265
Theorem riscv_cont_swap_full = GEN_ALL readable_thm;
7366

7467
val _ = export_theory ();

examples/riscv/swap/swap_symb_transfScript.sml

Lines changed: 10 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -13,35 +13,22 @@ open swap_symb_execTheory;
1313

1414
val _ = new_theory "swap_symb_transf";
1515

16-
(* --------------------- *)
17-
(* Auxiliary definitions *)
18-
(* --------------------- *)
19-
20-
val init_addr_tm = (snd o dest_eq o concl) swap_init_addr_def;
21-
val end_addr_tm = (snd o dest_eq o concl) swap_end_addr_def;
22-
23-
val bspec_pre_tm = (lhs o snd o strip_forall o concl) bspec_swap_pre_def;
24-
val bspec_post_tm = (lhs o snd o strip_forall o concl) bspec_swap_post_def;
25-
2616
(* ------------------------------- *)
2717
(* BIR symbolic execution analysis *)
2818
(* ------------------------------- *)
2919

3020
val bspec_cont_thm =
31-
bir_symb_transfer init_addr_tm end_addr_tm bspec_pre_tm bspec_post_tm
32-
bir_swap_prog_def swap_birenvtyl_def
33-
bspec_swap_pre_def bspec_swap_post_def swap_prog_vars_list_def
21+
bir_symb_transfer_thm
22+
bir_swap_prog_def
23+
swap_init_addr_def swap_end_addr_def
24+
bspec_swap_pre_def bspec_swap_post_def
25+
swap_birenvtyl_def swap_prog_vars_list_def
3426
swap_symb_analysis_thm NONE swap_prog_vars_thm;
3527

36-
Theorem bspec_cont_swap:
37-
bir_cont bir_swap_prog bir_exp_true
38-
(BL_Address (Imm64 ^init_addr_tm)) {BL_Address (Imm64 ^end_addr_tm)} {}
39-
^bspec_pre_tm
40-
(\l. if l = BL_Address (Imm64 ^end_addr_tm)
41-
then ^bspec_post_tm
42-
else bir_exp_false)
43-
Proof
44-
rw [bir_swap_prog_def,bspec_cont_thm]
45-
QED
28+
val _ = show_tags := true;
29+
30+
val _ = Portable.pprint Tag.pp_tag (tag bspec_cont_thm);
31+
32+
Theorem bspec_cont_swap = bspec_cont_thm
4633

4734
val _ = export_theory ();

examples/riscv/test-riscv.sml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ val _ = print_and_check_thm
3939
val _ = print_and_check_thm
4040
"swap BSPEC contract theorem"
4141
bspec_cont_swap
42-
``bir_cont (bir_swap_prog : 'a bir_program_t)
42+
``bir_cont (bir_swap_prog : 'obs_type bir_program_t)
4343
bir_exp_true (BL_Address (Imm64 0x10488w))
4444
{BL_Address (Imm64 0x1049cw)} {}
4545
(bspec_swap_pre pre_x10 pre_x11 pre_x10_deref pre_x11_deref)

src/tools/backlifter/bir_backlifterLib.sig

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,13 @@ sig
66
val get_arm8_contract : thm -> term -> term -> term ->
77
thm -> thm list -> thm -> thm -> thm list -> thm -> thm -> thm;
88

9-
val get_arm8_contract_thm : thm -> thm -> thm -> thm ->
9+
val get_arm8_contract_thm : thm -> thm -> thm list -> thm -> thm -> thm ->
1010
thm -> thm list -> thm -> thm -> thm list -> thm -> thm -> thm;
1111

1212
val get_riscv_contract : thm -> term -> term -> term ->
1313
thm -> thm list -> thm -> thm -> thm list -> thm -> thm -> thm;
1414

15-
val get_riscv_contract_thm : thm -> thm -> thm -> thm ->
15+
val get_riscv_contract_thm : thm -> thm -> thm list -> thm -> thm -> thm ->
1616
thm -> thm list -> thm -> thm -> thm list -> thm -> thm -> thm;
1717

1818
end

src/tools/backlifter/bir_backlifterLib.sml

Lines changed: 92 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,82 @@ open bir_inst_liftingHelpersLib;
119119
arch_contract_thm
120120
end;
121121

122+
fun get_arch_contract_thm arch_cont
123+
arch_lift_contract_thm arch_wf_varset_def arch_vars_def bir_post_bir_to_arch_def
124+
bir_ct init_addr_def end_addr_defs prog_bin_def arch_pre_def arch_post_def bir_prog_def bir_pre_defs
125+
bir_pre1_def arch_pre_imp_bir_pre_thm bir_post_defs
126+
arch_post_imp_bir_post_thm bir_is_lifted_prog_thm =
127+
let
128+
val prog_bin = (fst o dest_eq o concl) prog_bin_def;
129+
val arch_pre = (fst o dest_comb o lhs o snd o strip_forall o concl) arch_pre_def;
130+
val arch_post = (fst o dest_comb o lhs o snd o strip_forall o concl) arch_post_def;
131+
val init_addr = (fst o dest_eq o concl) init_addr_def;
132+
val end_addrs = pred_setSyntax.mk_set (map (fst o dest_eq o concl) end_addr_defs);
133+
val word_from_address = bir_immSyntax.dest_Imm64 o bir_programSyntax.dest_BL_Address;
134+
val bir_prog = get_bir_cont_prog bir_ct;
135+
val l = word_from_address (get_bir_cont_start_label bir_ct);
136+
val ls_set = get_bir_cont_ilist bir_ct;
137+
val ls = pred_setSyntax.mk_set (map word_from_address (pred_setSyntax.strip_set ls_set));
138+
val add_lift_thm =
139+
ISPECL [bir_prog,
140+
prog_bin,
141+
l,
142+
ls,
143+
(((el 2) o snd o strip_comb o concl) bir_is_lifted_prog_thm),
144+
arch_pre, arch_post,
145+
get_bir_cont_pre bir_ct,
146+
get_bir_cont_post bir_ct] arch_lift_contract_thm;
147+
(* Prove the arch triple by supplying the antecedents of lift_contract_thm *)
148+
val arch_contract_thm = prove (
149+
``^arch_cont ^prog_bin ^init_addr ^end_addrs ^arch_pre ^arch_post``,
150+
151+
once_rewrite_tac (init_addr_def :: end_addr_defs) >>
152+
irule add_lift_thm >>
153+
REPEAT STRIP_TAC >| [
154+
(* 1. Prove that the union of variables in the program and precondition are a well-founded variable
155+
* set *)
156+
rewrite_tac [bir_prog_def] >>
157+
CONV_TAC (bir_convLib.bir_vars_of_program_CONV) >>
158+
rewrite_tac ([arch_wf_varset_def, arch_vars_def]@bir_pre_defs) >>
159+
CONV_TAC (bir_convLib.bir_vars_of_exp_CONV) >>
160+
CONV_TAC (
161+
LAND_CONV (pred_setLib.UNION_CONV bir_convLib.bir_var_EQ_CONV) THENC
162+
holba_convLib.SUBSET_CONV bir_convLib.bir_var_EQ_CONV
163+
),
164+
(* 2. Starting address exists in program *)
165+
rewrite_tac [bir_prog_def] >>
166+
CONV_TAC (
167+
bir_convLib.bir_labels_of_program_CONV THENC
168+
RAND_CONV holba_convLib.LIST_TO_SET_CONV THENC
169+
pred_setLib.IN_CONV bir_convLib.bir_label_EQ_CONV
170+
),
171+
172+
(* 3. Provide translation of the arch precondition to the BIR precondition *)
173+
FULL_SIMP_TAC std_ss [bir_pre1_def, arch_pre_imp_bir_pre_thm],
174+
175+
(* 4. Provide translation of the arch postcondition to BIR postcondition *)
176+
ASSUME_TAC (Q.ISPEC `{BL_Address (Imm64 ml') | ml' IN ^ls}` arch_post_imp_bir_post_thm) >>
177+
FULL_SIMP_TAC std_ss bir_post_defs >>
178+
FULL_SIMP_TAC (std_ss++pred_setLib.PRED_SET_ss) [bir_post_bir_to_arch_def] >>
179+
FULL_SIMP_TAC std_ss [],
180+
181+
(* 5. Provide the lifter theorem of the program *)
182+
FULL_SIMP_TAC std_ss [bir_is_lifted_prog_thm],
183+
184+
(* 6. Provide the BIR triple in the requisite format *)
185+
ASSUME_TAC bir_ct >>
186+
`{BL_Address (Imm64 ml') | ml' IN ^ls} = ^ls_set` suffices_by (
187+
FULL_SIMP_TAC std_ss []
188+
) >>
189+
FULL_SIMP_TAC (std_ss++pred_setLib.PRED_SET_ss) [pred_setTheory.EXTENSION] >>
190+
METIS_TAC []
191+
]
192+
);
193+
194+
in
195+
arch_contract_thm
196+
end;
197+
122198
fun get_arm8_contract bir_ct prog_bin arm8_pre arm8_post bir_prog_def bir_pre_defs
123199
bir_pre1_def arm8_pre_imp_bir_pre_thm bir_post_defs
124200
arm8_post_imp_bir_post_thm bir_is_lifted_prog_thm =
@@ -128,18 +204,16 @@ open bir_inst_liftingHelpersLib;
128204
bir_pre_defs bir_pre1_def arm8_pre_imp_bir_pre_thm bir_post_defs
129205
arm8_post_imp_bir_post_thm bir_is_lifted_prog_thm;
130206

131-
fun get_arm8_contract_thm bir_ct progbin_def arm8_pre_def arm8_post_def bir_prog_def bir_pre_defs
207+
fun get_arm8_contract_thm bir_ct init_addr_def end_addr_defs prog_bin_def
208+
arm8_pre_def arm8_post_def bir_prog_def bir_pre_defs
132209
bir_pre1_def arm8_pre_imp_bir_pre_thm bir_post_defs
133210
arm8_post_imp_bir_post_thm bir_is_lifted_prog_thm =
134-
let
135-
val prog_bin = (fst o dest_eq o concl) progbin_def;
136-
val arm8_pre = (fst o dest_comb o lhs o snd o strip_forall o concl) arm8_pre_def;
137-
val arm8_post = (fst o dest_comb o lhs o snd o strip_forall o concl) arm8_post_def;
138-
in
139-
get_arm8_contract bir_ct prog_bin arm8_pre arm8_post bir_prog_def bir_pre_defs
140-
bir_pre1_def arm8_pre_imp_bir_pre_thm bir_post_defs
141-
arm8_post_imp_bir_post_thm bir_is_lifted_prog_thm
142-
end;
211+
get_arch_contract_thm ``arm8_cont`` arm8_lift_contract_thm
212+
arm8_wf_varset_def arm8_vars_def bir_post_bir_to_arm8_def
213+
bir_ct init_addr_def end_addr_defs prog_bin_def
214+
arm8_pre_def arm8_post_def bir_prog_def
215+
bir_pre_defs bir_pre1_def arm8_pre_imp_bir_pre_thm bir_post_defs
216+
arm8_post_imp_bir_post_thm bir_is_lifted_prog_thm;
143217

144218
fun get_riscv_contract bir_ct prog_bin riscv_pre riscv_post bir_prog_def bir_pre_defs
145219
bir_pre1_def riscv_pre_imp_bir_pre_thm bir_post_defs
@@ -150,18 +224,16 @@ open bir_inst_liftingHelpersLib;
150224
bir_pre_defs bir_pre1_def riscv_pre_imp_bir_pre_thm bir_post_defs
151225
riscv_post_imp_bir_post_thm bir_is_lifted_prog_thm;
152226

153-
fun get_riscv_contract_thm bir_ct progbin_def riscv_pre_def riscv_post_def bir_prog_def bir_pre_defs
227+
fun get_riscv_contract_thm bir_ct init_addr_def end_addr_defs prog_bin_def
228+
riscv_pre_def riscv_post_def bir_prog_def bir_pre_defs
154229
bir_pre1_def riscv_pre_imp_bir_pre_thm bir_post_defs
155230
riscv_post_imp_bir_post_thm bir_is_lifted_prog_thm =
156-
let
157-
val prog_bin = (fst o dest_eq o concl) progbin_def;
158-
val riscv_pre = (fst o dest_comb o lhs o snd o strip_forall o concl) riscv_pre_def;
159-
val riscv_post = (fst o dest_comb o lhs o snd o strip_forall o concl) riscv_post_def;
160-
in
161-
get_riscv_contract bir_ct prog_bin riscv_pre riscv_post bir_prog_def bir_pre_defs
162-
bir_pre1_def riscv_pre_imp_bir_pre_thm bir_post_defs
163-
riscv_post_imp_bir_post_thm bir_is_lifted_prog_thm
164-
end;
231+
get_arch_contract_thm ``riscv_cont`` riscv_lift_contract_thm
232+
riscv_wf_varset_def riscv_vars_def bir_post_bir_to_riscv_def
233+
bir_ct init_addr_def end_addr_defs prog_bin_def
234+
riscv_pre_def riscv_post_def bir_prog_def
235+
bir_pre_defs bir_pre1_def riscv_pre_imp_bir_pre_thm bir_post_defs
236+
riscv_post_imp_bir_post_thm bir_is_lifted_prog_thm;
165237

166238
end
167239
end

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