|
| 1 | +block/GPRCM: |
| 2 | + items: |
| 3 | + - name: PWREN |
| 4 | + description: Power enable. |
| 5 | + byte_offset: 0 |
| 6 | + fieldset: PWREN |
| 7 | + - name: RSTCTL |
| 8 | + description: Reset Control. |
| 9 | + byte_offset: 4 |
| 10 | + access: Write |
| 11 | + fieldset: RSTCTL |
| 12 | + - name: STAT |
| 13 | + description: Status Register. |
| 14 | + byte_offset: 20 |
| 15 | + access: Read |
| 16 | + fieldset: GPRCM_STAT |
| 17 | +block/TRNG: |
| 18 | + description: PERIPHERALREGION. |
| 19 | + items: |
| 20 | + - name: GPRCM |
| 21 | + byte_offset: 2048 |
| 22 | + block: GPRCM |
| 23 | + - name: IIDX |
| 24 | + description: Interrupt index. |
| 25 | + byte_offset: 4128 |
| 26 | + access: Read |
| 27 | + fieldset: IIDX |
| 28 | + - name: IMASK |
| 29 | + description: Interrupt mask. |
| 30 | + byte_offset: 4136 |
| 31 | + fieldset: INT |
| 32 | + - name: RIS |
| 33 | + description: Raw interrupt status. |
| 34 | + byte_offset: 4144 |
| 35 | + access: Read |
| 36 | + fieldset: INT |
| 37 | + - name: MIS |
| 38 | + description: Masked interrupt status. |
| 39 | + byte_offset: 4152 |
| 40 | + access: Read |
| 41 | + fieldset: INT |
| 42 | + - name: ISET |
| 43 | + description: Interrupt set. |
| 44 | + byte_offset: 4160 |
| 45 | + access: Write |
| 46 | + fieldset: INT |
| 47 | + - name: ICLR |
| 48 | + description: Interrupt clear. |
| 49 | + byte_offset: 4168 |
| 50 | + access: Write |
| 51 | + fieldset: INT |
| 52 | + - name: DESC |
| 53 | + description: Module descriptions. |
| 54 | + byte_offset: 4348 |
| 55 | + access: Read |
| 56 | + fieldset: DESC |
| 57 | + - name: CTL |
| 58 | + description: Controls the command and decimation rate. |
| 59 | + byte_offset: 4352 |
| 60 | + fieldset: CTL |
| 61 | + - name: STAT |
| 62 | + description: Status register that informs health test results and last issued command. |
| 63 | + byte_offset: 4356 |
| 64 | + access: Read |
| 65 | + fieldset: STAT |
| 66 | + - name: DATA_CAPTURE |
| 67 | + description: Captured word buffer of RNG data. |
| 68 | + byte_offset: 4360 |
| 69 | + access: Read |
| 70 | + - name: TEST_RESULTS |
| 71 | + description: Test results from TEST_ANA and TEST_DIG. |
| 72 | + byte_offset: 4364 |
| 73 | + access: Read |
| 74 | + fieldset: TEST_RESULTS |
| 75 | + - name: CLKDIV |
| 76 | + description: Clock Divider. |
| 77 | + byte_offset: 4368 |
| 78 | + fieldset: CLKDIV |
| 79 | +fieldset/CLKDIV: |
| 80 | + description: Clock Divider. |
| 81 | + fields: |
| 82 | + - name: RATIO |
| 83 | + description: Selects divide ratio of module clock. |
| 84 | + bit_offset: 0 |
| 85 | + bit_size: 3 |
| 86 | + enum: RATIO |
| 87 | +fieldset/CTL: |
| 88 | + description: Controls the command and decimation rate. |
| 89 | + fields: |
| 90 | + - name: CMD |
| 91 | + description: Sets the TRNG mode through a command. The mode will not be updated until the previous command is done, as indicated by IRQ_CMD_DONE. |
| 92 | + bit_offset: 0 |
| 93 | + bit_size: 2 |
| 94 | + enum: CMD |
| 95 | + - name: DECIM_RATE |
| 96 | + description: Set decimation rate. |
| 97 | + bit_offset: 8 |
| 98 | + bit_size: 3 |
| 99 | + enum: DECIM_RATE |
| 100 | + - name: PWRUP_CLKDIV |
| 101 | + description: When '1', the powerup sequence will take twice as long (i.e., clock frequency halved). |
| 102 | + bit_offset: 16 |
| 103 | + bit_size: 1 |
| 104 | + - name: PWRUP_PCHRG_CFG |
| 105 | + description: Configure PCHARGE sequence length. |
| 106 | + bit_offset: 17 |
| 107 | + bit_size: 2 |
| 108 | + enum: PWRUP_PCHRG |
| 109 | + - name: PWRUP_PSTART_CFG |
| 110 | + description: Configure pulse startup sequence length. |
| 111 | + bit_offset: 19 |
| 112 | + bit_size: 2 |
| 113 | + enum: PWRUP_PSTART |
| 114 | +fieldset/DESC: |
| 115 | + description: Module descriptions. |
| 116 | + fields: |
| 117 | + - name: MINREV |
| 118 | + description: Minor rev of the IP. |
| 119 | + bit_offset: 0 |
| 120 | + bit_size: 4 |
| 121 | + - name: MAJREV |
| 122 | + description: Major rev of the IP. |
| 123 | + bit_offset: 4 |
| 124 | + bit_size: 4 |
| 125 | + - name: INSTNUM |
| 126 | + description: Instance Number within the device. This will be a parameter to the RTL for modules that can have multiple instances. |
| 127 | + bit_offset: 8 |
| 128 | + bit_size: 4 |
| 129 | + - name: FEATUREVER |
| 130 | + description: Feature Set for the module *instance*. |
| 131 | + bit_offset: 12 |
| 132 | + bit_size: 4 |
| 133 | + - name: MODULEID |
| 134 | + description: Module Identifier - An internal TI page has been created to request unique module IDs. |
| 135 | + bit_offset: 16 |
| 136 | + bit_size: 16 |
| 137 | +fieldset/GPRCM_STAT: |
| 138 | + description: Status Register. |
| 139 | + fields: |
| 140 | + - name: RESETSTKY |
| 141 | + description: This bit indicates if the peripheral was reset, since this bit was cleared by RESETSTKYCLR in the RSTCTL register. |
| 142 | + bit_offset: 16 |
| 143 | + bit_size: 1 |
| 144 | +fieldset/IIDX: |
| 145 | + description: Interrupt index. |
| 146 | + fields: |
| 147 | + - name: STAT |
| 148 | + description: Interrupt index status. |
| 149 | + bit_offset: 0 |
| 150 | + bit_size: 8 |
| 151 | + enum: STAT |
| 152 | +fieldset/INT: |
| 153 | + description: Interrupt mask. |
| 154 | + fields: |
| 155 | + - name: IRQ_HEALTH_FAIL |
| 156 | + description: Mask for IRQ_HEALTH_FAIL. Indicates that a health test has failed. |
| 157 | + bit_offset: 0 |
| 158 | + bit_size: 1 |
| 159 | + - name: IRQ_CMD_FAIL |
| 160 | + description: Masked interrupt source for IRQ_CMD_FAIL. Indicates that the just issued command/mode has been rejected. |
| 161 | + bit_offset: 1 |
| 162 | + bit_size: 1 |
| 163 | + - name: IRQ_CMD_DONE |
| 164 | + description: Mask for IRQ_CMD_DONE. Indicates that a command has finished. |
| 165 | + bit_offset: 2 |
| 166 | + bit_size: 1 |
| 167 | + - name: IRQ_CAPTURED_RDY |
| 168 | + description: Mask for IRQ_CAPTURED_RDY. Indicates to the CPU that the Captured Word is ready to be read. |
| 169 | + bit_offset: 3 |
| 170 | + bit_size: 1 |
| 171 | +fieldset/PWREN: |
| 172 | + description: Power enable. |
| 173 | + fields: |
| 174 | + - name: ENABLE |
| 175 | + description: Enable the power. |
| 176 | + bit_offset: 0 |
| 177 | + bit_size: 1 |
| 178 | + - name: KEY |
| 179 | + description: KEY to allow Power State Change. |
| 180 | + bit_offset: 24 |
| 181 | + bit_size: 8 |
| 182 | + enum: PWREN_KEY |
| 183 | +fieldset/RSTCTL: |
| 184 | + description: Reset Control. |
| 185 | + fields: |
| 186 | + - name: RESETASSERT |
| 187 | + description: Assert reset to the peripheral. |
| 188 | + bit_offset: 0 |
| 189 | + bit_size: 1 |
| 190 | + - name: RESETSTKYCLR |
| 191 | + description: Clear the RESETSTKY bit in the STAT register. |
| 192 | + bit_offset: 1 |
| 193 | + bit_size: 1 |
| 194 | + - name: KEY |
| 195 | + description: Unlock key. |
| 196 | + bit_offset: 24 |
| 197 | + bit_size: 8 |
| 198 | + enum: RSTCTL_KEY |
| 199 | +fieldset/STAT: |
| 200 | + description: Status register that informs health test results and last issued command. |
| 201 | + fields: |
| 202 | + - name: ADAP_FAIL |
| 203 | + description: Indicates that the Adaptive Proportion Test (1,2,3, or 4-bit counters) failed by having too many or too few counted samples in the last 1024 bit window. |
| 204 | + bit_offset: 0 |
| 205 | + bit_size: 1 |
| 206 | + - name: REP_FAIL |
| 207 | + description: Indicates that the repetition counter test caused the most recent failure. Thus, the health count numbers are most likely not for a complete 1024-bit window. |
| 208 | + bit_offset: 1 |
| 209 | + bit_size: 1 |
| 210 | + - name: ISSUED_CMD |
| 211 | + description: Indicates the last accepted command that is issued to the TRNG interface. Upon writing a valid command, this register will update and the command will be in progress until CMD_DONE_IRQ is set. CMD_DONE_IRQ indicates that the state is in PWROFF, NORM_FUNC, or ERROR. These states will accept new commands. |
| 212 | + bit_offset: 8 |
| 213 | + bit_size: 2 |
| 214 | + enum: CMD |
| 215 | + - name: FSM_STATE |
| 216 | + description: Current state of the front end FSM (behind a clock domain crossing). 2 reads are REQUIRED as there is a chance of metastability when reading this. |
| 217 | + bit_offset: 16 |
| 218 | + bit_size: 4 |
| 219 | + enum: FSM_STATE |
| 220 | +fieldset/TEST_RESULTS: |
| 221 | + description: Test results from TEST_ANA and TEST_DIG. |
| 222 | + fields: |
| 223 | + - name: DIG_TEST |
| 224 | + description: Indicates if the decimation rate test and health test (verifies conditioning, decimation, and captured buffer) has succeeded. |
| 225 | + bit_offset: 0 |
| 226 | + bit_size: 1 |
| 227 | + array: |
| 228 | + len: 8 |
| 229 | + stride: 1 |
| 230 | + - name: ANA_TEST |
| 231 | + description: Runs through 4096 samples from an enabled entropy source and verifies that none of the health tests failed, indicating sufficient entropy was produced by the analog components. |
| 232 | + bit_offset: 8 |
| 233 | + bit_size: 1 |
| 234 | +enum/CMD: |
| 235 | + bit_size: 2 |
| 236 | + variants: |
| 237 | + - name: PWR_OFF |
| 238 | + description: Turns the power off of the analog source and clocks the digital interface. |
| 239 | + value: 0 |
| 240 | + - name: PWRUP_DIG |
| 241 | + description: Initiates the powerup test sequence for the digital components. This verifies that the digital components are properly working. IRQ_CMD_DONE indicates that the test is done. The results of this test are in DIG_TEST of the TEST_RESULTS register. |
| 242 | + value: 1 |
| 243 | + - name: PWRUP_ANA |
| 244 | + description: Initiates the powerup test sequence for the analog TRNG. This verifies that the analog component is generating sequences with enough entropy. IRQ_CMD_DONE indicates that the test is done. The results of this test are ANA_TEST of the TEST_RESULTS register. |
| 245 | + value: 2 |
| 246 | + - name: NORM_FUNC |
| 247 | + description: Normal operating mode for TRNG. All components are turned on. |
| 248 | + value: 3 |
| 249 | +enum/DECIM_RATE: |
| 250 | + bit_size: 3 |
| 251 | + variants: |
| 252 | + - name: DECIM_1 |
| 253 | + description: Decimation by 1 (no decimation) |
| 254 | + value: 0 |
| 255 | + - name: DECIM_2 |
| 256 | + description: Decimation by 2 (skip every other sample) |
| 257 | + value: 1 |
| 258 | + - name: DECIM_3 |
| 259 | + description: Decimation by 3 (take every 3rd sample) |
| 260 | + value: 2 |
| 261 | + - name: DECIM_4 |
| 262 | + description: Decimation by 4 (take every 4th sample) |
| 263 | + value: 3 |
| 264 | + - name: DECIM_5 |
| 265 | + description: Decimation by 5 (take every 5th sample) |
| 266 | + value: 4 |
| 267 | + - name: DECIM_6 |
| 268 | + description: Decimation by 6 (take every 6th sample) |
| 269 | + value: 5 |
| 270 | + - name: DECIM_7 |
| 271 | + description: Decimation by 7 (take every 7th sample) |
| 272 | + value: 6 |
| 273 | + - name: DECIM_8 |
| 274 | + description: Decimation by 8 (take every 8th sample) |
| 275 | + value: 7 |
| 276 | +enum/FSM_STATE: |
| 277 | + bit_size: 4 |
| 278 | + variants: |
| 279 | + - name: OFF |
| 280 | + value: 0 |
| 281 | + - name: PWRUP_ES |
| 282 | + value: 1 |
| 283 | + - name: PWRDOWN_ES |
| 284 | + value: 2 |
| 285 | + - name: NORM_FUNC |
| 286 | + value: 3 |
| 287 | + - name: TEST_DIG |
| 288 | + value: 7 |
| 289 | + - name: ERROR |
| 290 | + value: 10 |
| 291 | + - name: TEST_ANA |
| 292 | + value: 11 |
| 293 | +enum/PWREN_KEY: |
| 294 | + bit_size: 8 |
| 295 | + variants: |
| 296 | + - name: KEY |
| 297 | + value: 38 |
| 298 | +enum/PWRUP_PCHRG: |
| 299 | + bit_size: 2 |
| 300 | + variants: |
| 301 | + - name: DISABLE |
| 302 | + value: 0 |
| 303 | + - name: US_20 |
| 304 | + description: 20 us PCHARGE |
| 305 | + value: 1 |
| 306 | + - name: US_30 |
| 307 | + description: 30 us PCHARGE (default) |
| 308 | + value: 2 |
| 309 | + - name: US_40 |
| 310 | + description: 40 us PCHARGE |
| 311 | + value: 3 |
| 312 | +enum/PWRUP_PSTART: |
| 313 | + bit_size: 2 |
| 314 | + variants: |
| 315 | + - name: DISABLE |
| 316 | + value: 0 |
| 317 | + - name: RISE_10_FALL_50 |
| 318 | + description: rise at 10us, fall at 50us |
| 319 | + value: 1 |
| 320 | + - name: RISE_10_FALL_70 |
| 321 | + description: rise at 10us, fall at 70us (default) |
| 322 | + value: 2 |
| 323 | + - name: RISE_10_FALL_90 |
| 324 | + description: rise at 10us, fall at 90us |
| 325 | + value: 3 |
| 326 | +enum/RATIO: |
| 327 | + bit_size: 3 |
| 328 | + variants: |
| 329 | + - name: DIV_BY_1 |
| 330 | + description: Do not divide clock source. |
| 331 | + value: 0 |
| 332 | + - name: DIV_BY_2 |
| 333 | + description: Divide clock source by 2. |
| 334 | + value: 1 |
| 335 | + - name: DIV_BY_4 |
| 336 | + description: Divide clock source by 4. |
| 337 | + value: 3 |
| 338 | + - name: DIV_BY_6 |
| 339 | + description: Divide clock source by 6. |
| 340 | + value: 5 |
| 341 | + - name: DIV_BY_8 |
| 342 | + description: Divide clock source by 8. |
| 343 | + value: 7 |
| 344 | +enum/RSTCTL_KEY: |
| 345 | + bit_size: 8 |
| 346 | + variants: |
| 347 | + - name: KEY |
| 348 | + value: 177 |
| 349 | +enum/STAT: |
| 350 | + bit_size: 8 |
| 351 | + variants: |
| 352 | + - name: NO_INTR |
| 353 | + description: No bit is set means there is no pending interrupt request. |
| 354 | + value: 0 |
| 355 | + - name: IRQ_HEALTH_FAIL |
| 356 | + description: Indicates that a health test has failed. The TRNG is in an error state until the interrupt is cleared. |
| 357 | + value: 1 |
| 358 | + - name: IRQ_CMD_FAIL |
| 359 | + description: Indicates that the just issued command was rejected and is not being performed. |
| 360 | + value: 2 |
| 361 | + - name: IRQ_CMD_DONE |
| 362 | + description: 'Indicates that the current command/mode is done. This may have different meanings based on the mode: OFF --> Power has been turned off PWRUP_DIG --> Digital powerup tests are done PWRUP_ANA --> Analog powerup tests are done NORM_FUNC --> No IRQ, since mode runs indefinitely until a new command is issued.' |
| 363 | + value: 3 |
| 364 | + - name: IRQ_CAPTURED_RDY |
| 365 | + description: Indicates that the captured word buffer is ready to be copied to memory. |
| 366 | + value: 4 |
0 commit comments