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Verilog Implementation of Shift-and-Add Multiplier

This project implements a Shift-and-Add Multiplier using the Hardware Description Language (HDL) Verilog. The Shift-and-Add algorithm is a widely used technique for multiplying binary numbers and is particularly useful in digital hardware implementations.
Shift-and-Add Multiplier

Features

  • Efficient multiplication of binary numbers using the Shift-and-Add method
  • 8-bit or configurable bit-width implementation
  • Testbench provided for validating functionality
  • Detailed simulation results to verify correctness

Project Contents

Shift_Add_Multiplier_DP.v : Verilog code for the shift-and-add multiplier combinitial part

  • Data Path

Shift_Add_Multiplier_CO.v : Verilog code for the shift-and-add multiplier sequential part

  • Controler

How shift and add multiplaier work

shift and add multiplaier steps for 4 bit

Installation Guide

To run this project, ensure you have a Verilog simulation tool (such as Icarus Verilog or ModelSim) installed on your system. You can install Icarus Verilog using the following command:

sudo apt-get install iverilog