This repository contains all my Verilog solutions to HDLBits 180 problems. HDLBits is a collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL). Currently, I have completed 137/180 problems, all of which are in order.
To test these solutions, all you must do is change the module name of the exercise to top_module, and then run it in HDLBits.