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KapoorAkshit18/README.md

Hi ๐Ÿ‘‹, I'm Akshit Kapoor

ECE Student | Design Verification


๐Ÿš€ About Me

  • ๐ŸŽ“ Electronics & Communication Graduate
  • ๐Ÿ”ฌ Passionate about System Verilog and UVM Architecture for the Verification
  • ๐Ÿค– Building Edge AI models for microcontrollers (TinyML)
  • โšก Exploring hardwareโ€“software co-design

๐Ÿงฐ Tech Stack


๐Ÿง  Projects Highlights

  • ๐Ÿค– All-in-One Robot โ€“ Autonomous obstacle + light tracking robot
  • โš™๏ธ VLSI Design Lab โ€“ RTL modules, FSMs, and ALU implementations
  • ๐Ÿง  Edge AI Models โ€“ Quantized NN models on RISC-V MCUs

๐Ÿ“Š GitHub Stats


๐Ÿ GitHub Contribution Snake

Snake animation


๐Ÿค Connect With Me

Pinned Loading

  1. VSD-Real-World-Edge-AI-Lab VSD-Real-World-Edge-AI-Lab Public

    Jupyter Notebook 1

  2. power-electronics-converters power-electronics-converters Public

    MATLAB

  3. rf-antennas-and-metamaterials rf-antennas-and-metamaterials Public

    Academic Projects

  4. vsd-riscv vsd-riscv Public

    Advanced Embedded Systems

    Verilog 2

  5. nasscom-vsd-soc-design-workshop nasscom-vsd-soc-design-workshop Public

    2 Week SoC DIgital VLSI Workshop

    Verilog 1

  6. video_display_processor video_display_processor Public

    Final Year Project Performed at Shri Mata Vaishno Devi University

    C 1