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[hipblaslt] Fix fails with dtl.yaml and xfp32.yaml on gfx950_mx_rebase #4906

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Merged
nakajee merged 2 commits into from
Feb 26, 2026
Merged

[hipblaslt] Fix fails with dtl.yaml and xfp32.yaml on gfx950_mx_rebase #4906

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5c1198f
Fix fails with dtl.yaml
nakajee Feb 26, 2026
c3f84ef
Fix fails with xfp32.yaml on gfx950_mx_rebase branch
nakajee Feb 26, 2026
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2 changes: 1 addition & 1 deletion projects/hipblaslt/tensilelite/Tensile/Components/LocalRead.py
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Expand Up @@ -252,7 +252,7 @@ def __call__(self, writer, kernel, bufferIdx, iui, epsi, tP):
# fp64 TLU=1 reading 0.5element/lane/read..
# for TLU=0 case, blockWidth and LRVW should match
miInputPerGroup = kernel["MIInputPerThread%s"%tc]
if writer.states.asmCaps["HasMFMA_f8f6f4"] and ((tP["bpeDS"] * miInputPerGroup) > 24):
if writer.states.asmCaps["HasMFMA_f8f6f4"] and ((tP["bpeDS"] * miInputPerGroup) > 24) and not kernel["UseF32XEmulation"]:
miInputPerGroup = int(16 / tP["bpeDS"])
miInputGroup = kernel["MIInputPerThread%s"%tc] // miInputPerGroup
numReadsPerUnroll = ceil(tP["bpeDS"] * miInputPerGroup / int(unrollBlockWidth * bpr))
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6 changes: 3 additions & 3 deletions projects/hipblaslt/tensilelite/Tensile/KernelWriter.py
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Expand Up @@ -1872,7 +1872,7 @@ def calculateRangeAndUpdateCounter(itemCounter, writeCounters, length):
localReads += (localReadsA + localReadsB + localReadsMXSA + localReadsMXSB)

# some of localReads is interleaved after waitcnt in SIA3
if kernel["ScheduleIterAlg"] == 3 and self.states.numItersPLR and\
if scheduleIterAlg == 3 and self.states.numItersPLR and\
(iteration < maxNumberReadIter or numPrefetchIter):
if ((iteration < numReadsIterA and not dataAtIterA < maxDataAtIter) or numPrefetchIter) and (not kernel["DirectToVgprA"]):
localReads -= self.states.numReadsPerIterA * readFactorA
Expand Down Expand Up @@ -4024,9 +4024,9 @@ def _initKernel(self, kernel, tensorParametersA, tensorParametersB):
unitA = 1
unitB = 1
if ((not tluA) and (bpeGRA * asem < 4) and grvwa > 1):
unitA = 4 // (bpeGRA * asem)
unitA = int(4 / (bpeGRA * asem))
if ((not tluB) and (bpeGRB * asem < 4) and grvwb > 1):
unitB = 4 // (bpeGRB * asem)
unitB = int(4 / (bpeGRB * asem))
self.states.tailloopInNllmaxUnit = max(unitA, unitB)

# Only assembly supports scheduling
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4 changes: 3 additions & 1 deletion projects/hipblaslt/tensilelite/Tensile/KernelWriterAssembly.py
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Expand Up @@ -5282,7 +5282,7 @@ def generateFindTheLastElementLocation(tc):
comment="Calculate the remaining dimension along I/J direction."))
imod.add(SSubU32(dst=sgpr(sTmp0), src0=sgpr(strSize), src1=sgpr(sTmp0), \
comment="Calculate the remaining dimension along I/J direction."))
imod.add(SMulI32(dst=sgpr(sTmp0), src0=sgpr(sTmp0), src1=tP["bpeGR"], \
imod.add(SMulI32(dst=sgpr(sTmp0), src0=sgpr(sTmp0), src1=int(tP["bpeGR"]), \
comment="In bytes"))
imod.add(SAndB32(dst=sgpr(sTmp1), src0=sgpr("SizeL"), src1=(kernel["DepthU"] - 1), \
comment="Calculate the remaining dimension along L direction."))
Expand Down Expand Up @@ -6611,6 +6611,8 @@ def generateSrcStrForMFMA(self, kernel, tP, innerUnroll, vregSetIdx, vgprPerInpu
iui_new_offset = iui%numReadsIterCoalesced*vgprPerInput
ab_new = idxAB*vgprPerInput*numReadsIterCoalesced
abStr = "Valu%s_X%u_I%u+%u+%u+%u" % (tc, vgprBuffer_new, iui_new, ab_new, vgprBuffer_new_offset, iui_new_offset)
if kernel["UseDirect32XEmulation"] and bk != None and (int(bk) % 8) < 4:
abStr = "Valu%c_T%u_I%u+%u+%u+%u" % (tc, vgprBuffer_new, iui_new, ab_new // 2, vgprBuffer_new_offset, iui_new_offset)
if kernel["DirectToVgpr%s"%tc] and not (packDTV or convDTV):
# overwrite aStr/bStr for DirectToVgpr (except for pack DTV case)
numVgprPerBlock = statesTc.numVgprG2LAllocated
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2 changes: 1 addition & 1 deletion projects/hipblaslt/tensilelite/Tensile/SolutionStructs/Solution.py
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Expand Up @@ -2947,7 +2947,7 @@ def calSwizzlePackK(state, tc):
auto_LdsBlockSizePerPadB_for_mix = 0
if state["LdsBlockSizePerPadB"] == -1:
auto_LdsBlockSizePerPadB_for_mix = 1
state["LdsBlockSizePerPadA"], state["LdsBlockSizePerPadB"] = calcLdsBlockSizePerPad(-1) # for MX datatypes, the lrvw argument is ignored
state["LdsBlockSizePerPadA"], state["LdsBlockSizePerPadB"] = calcLdsBlockSizePerPad(state["LocalReadVectorWidth"])

if state["LdsBlockSizePerPadMetadata"] == -1:
state["LdsBlockSizePerPadMetadata"] = state["LdsBlockSizePerPadA"]
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