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Insn definitions for RV64#12

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pmatos wants to merge 28 commits intoportsfrom
rv64-insns
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Insn definitions for RV64#12
pmatos wants to merge 28 commits intoportsfrom
rv64-insns

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@pmatos pmatos commented Jun 5, 2020

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@pmatos pmatos added the enhancement New feature or request label Jun 5, 2020
@pmatos pmatos requested a review from jessealama June 5, 2020 05:36
@pmatos pmatos self-assigned this Jun 5, 2020
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pmatos commented Jun 5, 2020

Next work item: instruction definitions. Nothing to see here now.

@pmatos pmatos force-pushed the rv64-insns branch 2 times, most recently from f43eb82 to 8ef9d66 Compare June 11, 2020 14:30
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Can you merge in racket:master here (done in a separate PR)?

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pmatos commented Jun 12, 2020

Can you merge in racket:master here (done in a separate PR)?

Yes - merged master into ports, and rebased this on master. The issue is that master had a lot of fixed with regards to handling of floating point registers so the register definitions now require you to specify which are floating point registers. I had to redefine the floating point registers as you can see in changes for this PR. This also requires you to have a recent cs-bootstrap.

mflatt and others added 22 commits June 12, 2020 10:29
They apparently don't need to be preserved across a GC.
This consolidates use of GitHub Actions, since we are using it as well
with racket/racket.
Add testing for non-threaded x86_64, and i386 versions and remove references to travis_fold directives in testing.
Avoid allocating a flonum object for floating-opint calculations
that are consumed only by other floating-point caculations.

For this first cut, unboxing applies only to fl+, fl-, fl*, fl/,
flabs, fl<, fl<=, fl=, fl>, fl>=, bytevector-ieee-double-[native-]ref,
and bytevector-ieee-double-[native-]set!. Local variables can be
unboxed in the same way as implicit temporaries, and loop arguments
can be unboxed, but values in a closure and function-call arguments
are always boxed.

arm32 support is mostly in place, but not yet right. ppc32 support is
not yet implemented.

This commit includes a small change that is incompatible with previous
Chez Scheme versions: `(fl= +nan.0)` (and similar for other
comparisons) produces true instead of false.
Fix nested-loop handling with union find, and fix unboxing check
to properly account for a primitive's arity.
Includes a repair by @cjfrisz at cisco#510
This is a follow-up to 276f8da, where `(%tc-ref cp)` was preserved
by moving into `%cp`, but I missed that intrinisics for string and
bytevector arguments kill `%cp`.
The varargs convention differs from the fixed-argument convention on
arm32le.
This reverts commit aa230ac, so it
can be replaced with a solution that is less clumsy and less fragile.
This is a follow-up to 276f8da, where `(%tc-ref cp)` was supposed
to be preserved by moving it into %cp, but intrinisics for bytevector
arguments can kill %cp. Use a temporary to expose things properly to
the register allocator.
Simplify and normalize backend elements for loading, storing, and
converting floating-point numbers, taking better advantage of
new support for floating-pointer registers.
The comparison was off for 32-bit plaforms, because it didn't allow
fractional increments, The comparison was off for 64-bit platforms,
bbecause it didn't account for round-trip failure when starting from
the largest fixnum.
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