Add ARM target, SysTick emulation, and TCG SIG_IPI delivery for PDP bring-up - #161
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Add ARM target, SysTick emulation, and TCG SIG_IPI delivery for PDP bring-up#161nnadgaud wants to merge 1 commit into
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…ring-up Add ARM as a build target alongside aarch64 for PDP Cortex-M7 bring-up. Stop remapping arm→aarch64 in CMakeLists; add arm.c to the ARM meson target and promote NVIC/exclusive/post-init wrappers to aarch64|arm. Add SysTick emulation to NVICState (CSR/RVR/CVR at 0x10–0x1C, 19.2 MHz). Suppress PENDSVSET (ICSR bit 28) to avoid a Zephyr context-switch fault under asynchronous PendSV delivery. Fix TCG RR interrupt delivery via SIG_IPI so CPU_INTERRUPT_HARD is serviced promptly out of self-chained JIT TBs. Signed-off-by: Nikhita Nadgauda <nnadgaud@qti.qualcomm.com>
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Add ARM as a build target alongside aarch64 for PDP Cortex-M7 bring-up. Stop remapping arm to aarch64 in CMakeLists; add arm.c to the ARM meson target and promote NVIC/exclusive/post-init wrappers to aarch64|arm. Add SysTick emulation to NVICState (CSR/RVR/CVR at 0x10–0x1C, 19.2 MHz). Suppress PENDSVSET (ICSR bit 28) to avoid a Zephyr context-switch fault under asynchronous PendSV delivery. Fix TCG RR interrupt delivery via SIG_IPI so CPU_INTERRUPT_HARD is serviced promptly out of self-chained JIT TBs.