Search results

Mismatch for CPU block between schema and documentation

Status: Open.

#32 In Open-CMSIS-Pack/svd-spec;

· xoriath opened on Feb 26, 2026

/device/cpu element docs not aware of Cortex-M55 features

Status: Open.

#29 In Open-CMSIS-Pack/svd-spec;

· vmedcy opened on Nov 27, 2025

Docs link for current release is broken, only pre-release docs available.

Status: Open.

#25 In Open-CMSIS-Pack/svd-spec;

· smaillet opened on Aug 4, 2025

Spec docs (and schema) are missing definition of <code>registerNameType</code>

documentationImprovements or additions to documentationImprovements or additions to documentation

Status: Open.

Bug

#24 In Open-CMSIS-Pack/svd-spec;

· smaillet opened on Aug 3, 2025

Spec is missing detail on interpretation of <code>scaledNonNegativeInteger</code>

Status: Open.

#23 In Open-CMSIS-Pack/svd-spec;

· smaillet opened on Jul 24, 2025

Default values for registerPropertiesGroup are not documented or specified in xsd file

Status: Open.

#16 In Open-CMSIS-Pack/svd-spec;

· ckudera opened on Oct 2, 2024

Conditional register existence

enhancementNew feature or requestNew feature or request

Status: Open.

#15 In Open-CMSIS-Pack/svd-spec;

· WiseCrohn opened on Jul 19, 2024

[Question] Dynamic register offset

Status: Open.

#12 In Open-CMSIS-Pack/svd-spec;

· rmsyn opened on Mar 31, 2024

[Question] Split bit ranges

questionFurther information is requestedFurther information is requested

Status: Open.

#11 In Open-CMSIS-Pack/svd-spec;

· rmsyn opened on Mar 10, 2024

[Question] Peripheral SVD Files

enhancementNew feature or requestNew feature or request

Status: Open.

#5 In Open-CMSIS-Pack/svd-spec;

· tarek-bochkati opened on Dec 7, 2023

[SVD] optional peripherals

enhancementNew feature or requestNew feature or request

Status: Open.

#6 In Open-CMSIS-Pack/svd-spec;

· tarek-bochkati opened on Dec 6, 2023